1. Field of the Invention
The present invention relates to a reactor for manufacturing a semiconductor device, and particularly, to a reactor for depositing a layer on a moving substrate by plasma assisted chemical vapor deposition (PACVD), which is especially suitable for manufacturing a solar cell.
2. Description of the Related Art
The processes for manufacturing a semiconductor device by depositing a single or a plurality of thin semiconductor layers onto a substrate in a plasma atmosphere by chemical vapor deposition (CVD) are well known; for example, a process for manufacturing an amorphous silicon solar cell by a glow discharge decomposition of silane (SiH.sub.4) gas. Note, a typical amorphous silicon solar cell has a substrate/n-type microcrystalline silicon/i-type amorphous silicon/p-type microcrystalline silicon structure. Among the known processes, a process in which a substrate is continuously moved in a CVD plasma discharge atmosphere is considered suitable for the efficient manufacture of a thin semiconductor layer on a large scale.
This process can be carried out by the following two methods: The first is the load lock method in which a single, or if necessary a plurality of, completely isolated reaction chamber(s) for plasma discharge is (are) arranged between a loading chamber and a take-up chamber, and substrates are carried on a carriage and transferred through each chamber, including the reaction chamber, and a layer is deposited onto the substrates during the stay in the reaction chamber(s). The second is the roll-to-roll method in which a substrate is supplied as a form of a rolled-up strip which is transferred from a supply roll chamber to a take-up-roll chamber, between which a single, or if necessary a plurality of, reaction chamber(s) for plasma discharge is (are) arranged and a layer is deposited onto the substrate while it is continuously moved through the reaction chamber(s).
In an advantageous process, a p-i-n structure of a solar cell is manufactured in successively connected reaction chambers through which a substrate, preferably a rolled-up strip, is continuously moved, and in which p-type, i-type, and n-type layers are successively deposited.
In a process for depositing semiconductor layers onto a substrate by plasma discharge CVD (plasma assisted CVD), if a plurality of layers having different compositions or levels of doping impurity are to be formed, the reaction gas is changed for each layer in a reaction chamber, or a plurality of reaction chambers, in which different reaction gases are used, and a substrate is transferred successively through the reaction chambers. This is because a single reaction chamber involves an almost uniform composition of plasma gas and does not allow an appropriate spacial distribution of the composition of the plasma gas. Therefore, if a desired spacial distribution of the composition of the plasma gas could be formed in a single reaction chamber, a plurality of layers having different composition or levels of doping impurity could be formed only by moving a substrate through a plasma gas having such a desired spacial distribution of the compositions in a single reaction chamber, thus allowing the process and apparatus of manufacturing the plurality of layers to be simplified.
A disadvantage when a plurality of layers having different compositions or doping levels are to be formed consecutively on a substrate, is that plurality of reaction chambers becomes necessary because a reaction gas having a each required composition must be fed into each of the reaction chambers.
When a plurality of reaction chambers are used in the roll-to-roll method, the respective reaction chambers are not completely separated and independent, but are interconnected by a passage along which the substrate is moved, and as a result, it is inevitable that the reaction gases in neighbor reaction chambers will be intermixed by movement of a substrate through the passage connecting the reaction chambers. As the above intermixing of reaction gases causes a deterioration of the characteristics of a device which comprises a plurality of layers having different compositions, proposals have been made to form a predetermined directional gas flow along the substrate passage connecting the reaction chambers (see Japanese Unexamined Patent Publication (Kokai) No. 58-216475); to provide a buffer chamber between the reaction chambers, by which each reaction gas in the reaction chambers is isolated to a predetermined level by evacuation (see Japanese Unexamined Patent Publication (Kokai) No. 59-34668); and to provide a slot interconnecting the reaction chambers and establish a gas flow from the slot into a reaction chamber at a rate sufficient to maintain a ratio of 10.sup.4 of concentration between the reaction chambers (U.S. Pat. No. 4,438,723). However, in these methods, once a reaction gas penetrates a neighboring reaction chamber having a different reaction gas composition beyond the isolation means (the buffer chamber), the penetrated reaction gas diffuses throughout the entire neighbouring reaction chamber and becomes uniformly distributed in that reaction chamber thus there is no way of controlling the distribution of the composition or the level of doping impurity in a direction of the layer thickness at the interface of successive deposited layers, for example, to obtain a graded junction or a stepped junction. It is known that a specific profile of a dopant level in an i-type silicon layer may improve the cell characteristics of an amorphous silicon solar cell having a p-i-n structure (For example, "Technical Digest, 1st International Photovoltaic Science and Engineering Conference Nov. 13-16/1984", P-I-16, pp. 187-190). Therefore, the capability to control the profile of a doping level in a deposited layer is obviously advantageous in the manufacture of an amorphous silicon solar cell.
One object of the present invention is to solve the above-mentioned problems of the prior art and to allow the control of a spacial distribution of a reaction gas in a single reaction chamber during plasma discharge CVD.
Another object of the present invention is to provide, for example, layers having a desired interface profile such as a graded or stepped junction.
In the manufacture of a solar cell on a large scale, the deposition rate should be increased. To accelerate the deposition rate, the glow discharge power is increased under the supply of sufficient reaction gas to increase the concentration of the active species. However, in that method, the increase of the glow discharge power causes an increase of the kinetic energies of the charged particles, causing so-called plasma damage, for example, damage to the surface of the substrate or the layer deposited on the substrate by bombardment of the charged particles, and as a result, deterioration of the characteristics of a device comprising a deposited layer. This disadvantage is particularly noticeable when an i-type semiconductor layer is formed on a p-type or n-type semiconductor layer in the manufacture of an amorphous silicon solar cell.
A further object of the present invention is to solve this problem of the prior art and to allow a fast deposition of a layer by plasma discharge CVD without plasma damage.
An arrangement of the thickness of a layer is necessary in the deposition of a layer on a moving substrate in plasma discharge CVD. To this purpose, a mask is sometimes provided to control the amount of plasma reaching the surface of a substrate so that the thickness of a deposited layer is arranged. A mask is also used for depositing a layer in a desired pattern. However, the inventors found that this arrangement of a mask causes variations in the quality of the deposited semiconductor layer, between the edge portion and the central portion of the opening of the mask. When a microcrystallized amorphous silicon layer was deposited in plasma discharge CVD with a mask, it was found that a portion of the deposited layer near the edge of the opening of the mask had been microcrystallized but the deposited layer near the center of the opening of the mask was amorphous and the conductivity of the deposited layer gradually decreased from the edge toward the center of the layer.
Therefore, an object of the present invention is to solve this problem and to allow a deposition of a uniform layer even when a mask is used to control the quality or thickness of a layer to be deposited.